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feat(dts): add xiangshan-fpga-AIA-mem16g.dts - #40

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klin02 merged 1 commit into
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fpga-aia-mem16g
Jul 29, 2026
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feat(dts): add xiangshan-fpga-AIA-mem16g.dts#40
klin02 merged 1 commit into
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fpga-aia-mem16g

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@klin02 klin02 commented Jul 29, 2026

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Add a single-hart XiangShan FPGA device-tree profile with 16 GiB DDR and 64 APLIC interrupt sources.

Match riscv-linux devel's kmh-v2.dtsi for the APLIC and IMSIC address windows, IMSIC IDs and guest-file layout, and CPU ISA declarations. Keep the workload-builder FPGA console, initramfs, and OpenSBI settings.

Override the upstream 96-source and 13 GiB declarations for this 64-source, 16 GiB FPGA configuration.

Add a single-hart XiangShan FPGA device-tree profile with 16 GiB DDR
and 64 APLIC interrupt sources.

Match riscv-linux devel's kmh-v2.dtsi for the APLIC and IMSIC address
windows, IMSIC IDs and guest-file layout, and CPU ISA declarations.
Keep the workload-builder FPGA console, initramfs, and OpenSBI settings.

Override the upstream 96-source and 13 GiB declarations for this
64-source, 16 GiB FPGA configuration.
@klin02
klin02 requested a review from poemonsense July 29, 2026 11:45
@klin02
klin02 merged commit 3afcec0 into main Jul 29, 2026
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@klin02
klin02 deleted the fpga-aia-mem16g branch July 29, 2026 14:27
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